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 WIRELESS COMMUNICATIONS DIVISION
TQ5633
RF INPUT RF IN VDD RF Amplifier Vdd LO IN LO Input RF amplifier Control
DATA SHEET
GND IF Common Mode Tune
3V PCS Band CDMA RFA/Mixer IC
Tune
GND
Mixer Vdd
VDD
IF out
IF OUTPUT
Features
Small size: SOT23-8 Single 3V operation Low-current operation
Product Description
The TQ5633 is a 3V, RF Amplifier/Mixer IC designed specifically for PCS band CDMA applications. It's RF performance meets the requirements of products designed to the IS-95 standard. The TQ5633 is designed to be used with an IF frequency of 110MHz, and uses a balanced mixer to achieve 1/2 IF rejection. When used with the TQ3631 or TQ3632 (CDMA LNAs) it provides a complete CDMA receiver for 1900MHz phones. The RF Amplifier/Mixer incorporates on-chip switches which determine two gain select states. The RF and LO input ports are internally matched to 50 , greatly simplifying the design and keeping the number of external components to a minimum. The TQ5633 achieves good RF performance with low current consumption, supporting long standby times in portable applications. Coupled with the very small SOT23-8 package, the part is ideally suited for PCS band mobile phones. Electrical Specifications1
Min Typ 1960 16.0 5.8 -0.5 23.0
LO input -4dBm, CDMA High Gain state.
Gain Select High IP3 performance Few external components Excellent 1/2 IF rejection 110MHz IF Frequency 50 RF and LO inputs
Applications
IS-95 CDMA Mobile Phones Wireless Local Loop PCS Micro-cell
Parameter Frequency Gain Noise Figure Input 3rd Order Intercept DC supply Current
Max
Units MHz dB dB dBm mA
Note 1: Test Conditions: Vdd=2.8V, RF=1960MHz, LO=2070MHz, IF=110MHz, Ta=25C,
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1
TQ5633 Data Sheet
Electrical Characteristics
Parameter RF Frequency IF Frequency LO Frequency Conditions PCS band Min. 1930 100 2030 Typ/Nom 1960 110 2070 Max. 1990 130 2120 Units MHz MHz MHz
CDMA Mode-High Gain
Gain Noise Figure Input IP3 1/2 IF IIP2 Supply Current -1.5 14.8 16.0 5.8 -0.5 27 23.0 26.5 6.7 dB dB dBm dBm mA
CDMA Mode-Low Gain
Gain Noise Figure Input IP3 1/2 IF IIP2 Supply Current Supply Voltage
Note 2: Min/Max limits are at +25C case temperature, unless otherwise specified.
5.8
7.0 10.0 9.5 32 18.5
dB dB dBm dBm mA 2.9 V
2.7
2.8
Note 1: Test Conditions: Vdd=2.8V, RF=1960MHz, LO=2070MHz, IF=110MHz, TC = 25 C, LO input -4dBm, unless otherwise specified.
Absolute Maximum Ratings
Parameter DC Power Supply Power Dissipation Operating Temperature Storage Temperature Signal level on inputs/outputs Voltage to any non supply pin Value 3.6 500 -30 to 85 -60 to 150 +20 -0.5 to +0.5 Units V mW C C dBm V
2
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TQ5633 Data Sheet
Typical Performance, Note:HG Mode=High Gain Mode, LG Mode=Low Gain Mode
Test Conditions, unless otherwise specified: Vdd=2.8V, Ta=25C, RF=1960MHz, LO=2070MHz, IF=110MHz, LO input=-4dBm Conversion Gain vs Frequency 16 14 Gain (dB) 12 10 8 6 1930
HG Mode LG Mode
Conversion Gain vs. Vdd 18 16 14 Gain (dB) 12 10 8 6 4
HG Mode LG Mode
1940
1950
1960
1970
1980
1990
2.7
2.8
2.9 Vdd (V)
3
3.1
3.2
Frequency (MHz)
Input IP3 vs. Frequency 9.5 7.5 IIP3 (dBm) 5.5 3.5 1.5 -0.5 1930
HG Mode LG Mode
Input IP3 vs. Vdd 11.5 9.5 IIP3 (dBm) 7.5 5.5 3.5 1.5 -0.5
HG Mode LG Mode
1940
1950
1960
1970
1980
1990
2.7
2.8
2.9 Vdd (V)
3
3.1
3.2
Frequency (MHz)
Noise Figure vs Frequency 11 10 Noise Figure (dB) IIP2 (dBm) 9 8 7 6 5 1930
HG Mode LG Mode
Half-IF Input IP2 vs. Vdd 40 35 30 25 20 15
HG Mode LG Mode
1940
1950
1960
1970
1980
1990
2.6
2.7
2.8
2.9
3
3.1
3.2
3.3
Frequency (MHz)
Vdd (V)
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3
TQ5633 Data Sheet
Noise Figure vs. Vdd 11 10 Noise Figure (dB) 9 8 7 6 5 2.7 2.8 2.9 Vdd (V) 3 3.1 3.2
HG Mode LG Mode
Input IP3 vs. LO Power 11 9 IIP3 (dBm) 7 5 3 1 -1 -7 -6 -5 -4 -3 -2 -1 LO Power (dBm)
HG Mode LG Mode
Idd vs. Vdd 30 28 26 Idd (mA) 24 22 20 18 16 2.7 2.8 2.9 Vdd (V) 3 3.1 3.2
HG Mode LG Mode
Half-IF Input IP2 vs. LO Power 40 35 IIP2 (dBm) 30 25 20 15 -7 -6 -5 -4 LO Power (dBm) -3 -2 -1
HG Mode LG Mode
Conversion Gain vs. LO Power 11 15 13 Gain (dB) 11 9 7 5 -7 -6 -5 -4 -3 LO Power (dBm) -2 -1
HG Mode LG Mode
Noise Figure vs. LO Power
10 Noise Figure (dB) 9 8 7 6 5 -7 -6 -5 -4 -3 -2 -1 LO Power (dBm)
HG Mode LG Mode
4
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TQ5633 Data Sheet
Idd vs. LO Power 24 23 22 IIP2 (dBm) Idd (mA) 21 20 19 18 17 16 -7 -6 -5 -4 -3 -2 -1 LO Power (dBm) 15 -30 -10 10 30 50 70 90 Temperature (C)
HG Mode LG Mode
Half-IF Input IP2 vs. Temperature 40 35 30 25 20
HG Mode LG Mode
Conversion Gain vs. Temperature 18 16 12 Gain (dB) 10 8 6 4 2 0 -30 0 30 Temperature (C) 60 90 Noise Figure (dB) 14
HG Mode LG Mode
Noise Figure vs. Temperature 12 11 10 9 8 7 6 5 4 -30 -10 10 30 50 70 90 Temperature (C)
HG Mode LG Mode
Input IP3 vs. Temperature 11.5 9.5 IIP3 (dBm) 7.5 Idd (mA) 5.5 3.5 1.5 -0.5 -30 -10 10 30 50 70 90 Temperature (C)
HG Mode LG Mode
Idd vs. Temperature 28 26 24 22 20 18 16 14 12 10 -30 -10 10 30 50 70 90 Temperature (C)
HG Mode LG Mode
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5
TQ5633 Data Sheet
Application/Test Circuit
RF INPUT
RF IN
R3
VDD
C5 C6
RF Amplifier Vdd
GND IF Common Mode Tune
C3 L2
LO IN
LO Input
R1 C7
Control 2 Gain Select
Tune
GND
L3
R5
Mixer Vdd
VDD
R4 C4
IF out
C9 C8
Vdd IFA
IF OUTPUT
Bill of Material for TQ5633 RF AMP/Mixer
Component Receiver IC Capacitor Capacitor Capacitor Capacitor Resistor Resistor Inductor Inductor Reference Designator U1 C3 C4, C6, C8 C5, C7 C9 R1 R3, R4, R5 L2 L3 Part Number TQ5633 3.3pF 1000pF 5.6pF 10pF 2.2K 3.3 470nH 220nH Value Size SOT23-8 0603 0603 0603 0603 0603 0603 0805 0805 Toko Toko Manufacturer TriQuint Semiconductor
6
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TQ5633 Data Sheet
TQ5631 Product Description
The TQ5633 is a balanced mixer down converter which integrates the gain step functions required for PCS CDMA handsets. The device requires minimal components and mates with the TQ3631 or TQ3632 series of high band LNAs. The TQ5633 was designed specifically for the needs of systems using a low IF in the range of 85MHz to 130MHz, as it provides a very high IP2. Some other outstanding features are 50ohm matches at the RF input and LO input in both modes.
C3 Vdd Mixer L2 Vdd R5 IFA R4
4 5
RF Input
F1 R3
1 8
Vdd RFA
C5 LO Input
C6
2 7
R1 C7
3 6
C2, Gain Select
L3 C4 TQ5633 C8 C9
IF Output
Simplified theory of operation
The TQ5633 contains a RF amplifier, balanced mixer, LO buffer, IF amplifier and gain step switches. Figure 1 shows a block diagram. In the high gain mode, the RF Amp is turned on and the bypass switch is turned off. RF signal enters pin 1 and is amplified by 10dB before arriving at the passive balanced mixer. Total conversion gain is approximately 16dB. The LO input at pin 8 is amplified by a saturating balanced driver before being applied to the mixer. By using amplification the LO drive remains constant over some range of LO input power and temperature. The LO tuning is internal and centered around 2070MHz. The mixer utilizes proprietary techniques for attaining a very high degree of balance. It converts the PCS band signal down to approximately 110MHz using a high side LO source. By utilizing a passive mixer it provides for excellent IP3 response. The IF signal is taken off of the mixer and applied to an IF amplifier which provides gain. The source of the IF stage is brought out to pin 3 so an external tuned circuit can be used to optimize IP2. The tuned circuit works by providing a high IF impedance at the source of the output differential pair. High IF common-mode rejection and balance are achieved by using a high IF impedance. The low gain mode differs in that the RF amplifier is turned off and passive switches route the RF input signal directly to the mixer. In that case the total conversion gain is approximately 7dB. Figure 1 TQ5633 Simplified Block Diagram and Schematic
Logic truth table and logic control functions
The TQ5633 logic control was designed to mate with the TQ3631 or TQ3632 PCS Band LNAs. Although the TQ5633 has only one logic control line "C2", it's possible to obtain 4 different gain states when used in conjunction with the LNAs. Moreover, only two logic lines are needed. On the TQ5633 the "C2" control signal is superimposed on the LO input pin 7. A simple 2.2k ohm resistor and blocking capacitor serve as the decoupling network. Table 1 shows the logic control and device states for a TQ3631-TQ5633 combination.
Control Lines C2 0 0 C3 0 1
System Mode
LNA State
TQ5633 State
High Gain High Gain, Low Linearity Mid Gain Low Gain
High Gain High Gain, Low Linearity High Gain Bypass
High Gain High Gain
1 1
0 1
Low Gain Low Gain
Logic Table 1
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7
TQ5633 Data Sheet
TUNING: IF Amplifier- The IF amplifier output at pin 5 requires a
match down to 50 ohms in addition to a source of DC bias. A simple matching network that performs well for both functions is a shunt-L series-C type. See Figure 1. The L3 inductor provides DC bias to the IF amplifier while functioning as part of the IF matching network. The C9 capacitor provides a DC block and functions as the second AC matching component. During the design phase it is usually fairly easy to empirically determine these components by attaching a network analyzer to the 50ohm side of the IF network, and vary L3 and C9 until good return loss at the IF frequency is obtained. Typical values for L3 will be 180nH to 270nH and typical values of C9 are from 4.7pF to 15pF. Note that unlike a single-ended mixer type design, a shunt-C element at the output is not required. The TQ5633 leaks only a small amount of LO energy out of the RF port, so no additional shunt-C filtering is required.
RF Input F1
1
REMOVE TQ5633 FROM BOARD
8
R3 C5
Vdd RFA
2 COAXIAL PROBE Ground at pad 2
7
C6 R1 C7
LO Input
3
6
C2, Gain Select
C3 Vdd Mixer
L2 Vdd R5 IFA
R4 C4
4
5
L3 C8
MEASURE S11
C9
IF Output
NETWORK ANALYZER
IF Tank Circuit- As discussed in the introduction, the
parallel LC circuit on pin 3 functions by creating a high IF impedance at the sources of the IF amplifier, improving common mode rejection. Once a prototype phone board layout is finished there remains the task of assigning the values of these components. For a parallel circuit Rp = Q x Xp. Thus the higher Q and Xp (i.e. Lp) are, the better IP2 will be. However, too high of a value for L2 will make the circuit more prone to parasitic capacitances. A good compromise would be to follow the evaluation board example and start with a 3.3pF capacitor for C3. Then using a network analyzer probe measure the impedance at the pin 3 pad with the TQ5633 absent. Adjust L2 until the network analyzer measures S11 as close as possible to = 1 at an angle of (i.e. an open circuit). In practice an |S11| of 7.5k ohms is attainable with a 0805 size 470nH inductor. Smaller package 0603 and 0402 inductors may not be obtainable in 00 such high values so that some compromises will have to be made if inductor size is an issue. See Figure 2.
S11
Marker at IF freq e.g. 110MHz
Figure 2 IF Tank Tuning Further Improving IP2:
Although the TQ5633 is exceptional in its isolation of the LO signal from the RF port, there is still a miniscule amount of LO energy present, typically -40dBc. That energy tends to bounce off of the image filter and reenter the downconverter where, depending on its phase, it creates a very small DC offset in the mixer. The phenomena occurs in the Low Gain mode where it can create 4 to 5 dBm variation in IP2 depending on how closely the image filter is located to the TQ5633. Thus for applications demanding the highest Half-IF spur rejection, higher IP2 can possibly be obtained by tailoring the length of the transmission line between the filter and chip. The specific line length will depend upon board layout and will vary between filter types. If it appears that the needed length will be long, the line can be "U" shaped in order to conserve space. Measurements have indicated that there is some reduction in gain at the optimum line length.
8
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TQ5633 Data Sheet
Package Pinout
RF INPUT
RF IN
VDD RF Amplifier Vdd LO IN LO Input RF amplifier Control
GND IF Common Mode Tune
Tune
GND
Mixer Vdd
VDD
IF out
IF OUTPUT
Pin Descriptions
Pin Name RF INPUT GND Tune Vdd IF OUT GND LO INPUT Vdd Pin # 1 2 3 4 5 6 7 8 Description and Usage RF Amplifier Input Ground IF Amplifier Common Mode Point Mixer Vdd IF Output and IF Amplifier Vdd LO Common Mode Ground LO Input and RF Amplifier Gain Select RF Amplifier Vdd
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9
TQ5633 Data Sheet
Package Type: SOT23-8 Plastic Package
Note 1
PIN 1 FUSED LEAD
b A c
E E1
Note 2
DIE
e
A1
L
DESIGNATION A A1 b c D e E E1 L Theta
DESCRIPTION OVERALL HEIGHT STANDOFF LEAD WIDTH LEAD THICKNESS PACKAGE LENGTH LEAD PITCH LEAD TIP SPAN PACKAGE WIDTH FOOT LENGTH FOOT ANGLE
METRIC 1.20 +/-.25 mm .100 +/-.05 mm .365 mm TYP .127 mm TYP 2.90 +/-.10 mm .65 mm TYP 2.80 +/-.20 mm 1.60 +/-.10 mm .45 +/-.10 mm 1.5 +/-1.5 DEG
ENGLISH 0.05 +/-.250 in .004 +/-.002 in .014 in .005 in .114 +/-.004 in .026 in .110 +/-.008 in .063 +/-.004 in .018 +/-.004 in 1.5 +/-1.5 DEG
NOTE 3 3 3 3 1,3 3 3 2,3 3
Notes 1. The package length dimension includes allowance for mold mismatch and flashing. 2. The package width dimension includes allowance for mold mismatch and flashing. 3. Primary dimensions are in metric millimeters. The English equivalents are calculated and subject to rounding error.
Additional Information
For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Tel: (503) 615-9000 Fax: (503) 615-8900
For technical questions and additional information on specific applications:
The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright (c) 2000 TriQuint Semiconductor, Inc. All rights reserved. Revision A, May, 2000
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